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ADE7880
HSCLK
Data Sheet
31
0
31
0
31
0
31
0
HSDATA
IAVW (32-BIT)
7 HCLK
CYCLES
VAWV (32-BIT)
7 HCLK
CYCLES
IBWV (32-BIT)
CFVAR (32-BIT)
HSA
Figure 109. HSDC Communication for HSIZE = 0, HGAP = 1, HXFER[1:0] = 00, and HSAPOL = 0
HSCLK
31
24
23
16
15
8
7
0
HSDATA
IAVW (BYTE 3)
7 HCLK
CYCLES
IAVW (BYTE 2)
7 HCLK
CYCLES
IAVW (BYTE 1)
CFVAR (BYTE 0)
HSA
Figure 110. HSDC Communication for HSIZE = 1, HGAP = 1, HXFER[1:0] = 00, and HSAPOL = 0
ADE7880 QUICK SETUP AS ENERGY METER
An energy meter is usually characterized by the nominal
current I n , nominal voltage V n , nominal frequency f n , and the
meter constant MC.
To quickly set up the ADE7880 , execute the following steps:
5.
6.
Initialize WTHR, VARTHR, VATHR, VLEVEL and
VNOM registers based Equation 26, Equation 37, Equation
44, Equation 22, and Equation 42, respectively.
Enable the data memory RAM protection, by writing
0xAD to an internal 8-bit register located at Address
0xE7FE, followed by a write of 0x80 to an internal 8-bit
1.
2.
3.
4.
Select the PGA gains in the phase currents, voltages and
neutral current channels: Bits[2:0] (PGA1), Bits[5:3]
(PGA2) and Bits[8:6] (PGA3) in the Gain register.
If Rogowski coils are used, enable the digital integrators in
the phase or neutral currents channels: Bit 0 (INTEN) in
CONFIG register and Bit 3 (ININTEN) in CONFIG3
register.
If f n = 60 Hz, set Bit 14 (SELFREQ) to 1 in the
COMPMODE register.
Initialize CF1DEN, CF2DEN, and CF3DEN registers based
in Equation 49.
register located at Address 0xE7E3.
7. Start the DSP by setting Run = 1.
For a quick setup of the ADE7880 harmonic calculations,
see the Recommended Approach to Managing Harmonic
Calculations section.
ADE7880 EVALUATION BOARD
An evaluation board built upon the ADE7880 configuration
is available. Visit www.analog.com/ADE7880 for details.
DIE VERSION
The register named version identifies the version of the die.
It is an 8-bit, read-only register located at Address 0xE707.
Rev. A | Page 80 of 104
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